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Text File  |  1992-04-28  |  10KB  |  180 lines
  1.  
  2.  
  3.          /***********************************************\
  4.          |**                                           **|
  5.          |**   DSP56200 CHIP DRIVER -DUAL FIR FILTERS  **|
  6.          |**                        -POLLED I/O        **|
  7.          |**                                           **|
  8.          \***********************************************/
  9.  
  10.  
  11.  
  12. /************************************************************************\
  13. *                                                                        *
  14. *   This file contains a flowchart of the host processor program used    *
  15. *   to setup and service a single DSP56200 as two real-time FIR filters. *
  16. *   In this example, the host processor polls a general purpose input    *
  17. *   pin to determine the beginning of a new sample period, signified     *
  18. *   by the reception of a rising edge on the DSP56200's START pin. The   *
  19. *   general purpose input pin is tied directly to the START pin of the   *
  20. *   DSP56200.                                                            *
  21. *                                                                        *
  22. *                                                                        *
  23. *   The example system is configured as shown below:                     *
  24. *                                                                        *
  25. *                                                                        *
  26. *                            ------------                                *
  27. *                            | DSP56200 |                                *
  28. *                            ------------                                *
  29. *                                  ^                                     *
  30. *                                  |                                     *
  31. *                                  v                                     *
  32. *               -------    ------------------    -------                 *
  33. *      x1(t) -->| A/D |--->| Host Processor |--->| D/A |--> out1(t)      *
  34. *               -------    |                |    -------                 *
  35. *                          | (contains code |                            *
  36. *               -------    |  found in this |    -------                 *
  37. *      x2(t) -->| A/D |--->|     file)      |--->| D/A |--> out2(t)      *
  38. *               -------    ------------------    -------                 *
  39. *                                                                        *
  40. *                                                                        *
  41. *                   Figure 1. Dual FIR Filtering System                  *
  42. *                                                                        *
  43. *                                                                        *
  44. *                                                                        *
  45. *   There is only one DSP56200 in this example (i.e., not multiple       *
  46. *   DSP56200s in cascade), and it is configured in the Dual FIR Filter   *
  47. *   mode (Figure 2) by writing the DSP56200's Configuration register.    *
  48. *   Since only 16 bit  results  are sent to each D/A Converter, the      *
  49. *   outputs are rounded to 16 bits by the DSP56200.                      * 
  50. *                                                                        *
  51. *                                                                        *
  52. *                                                                        *
  53. *                                                                        *
  54. *                           --------------                               *
  55. *                           |  1st  FIR  |                               *
  56. *               x1(n) ----->|   Filter   |-----> out1(n)                 *
  57. *                           |  (7 taps)  |                               *
  58. *                           --------------                               *
  59. *                                                                        *
  60. *                           --------------                               *
  61. *                           |  2nd  FIR  |                               *
  62. *               x2(n) ----->|   Filter   |-----> out2(n)                 *
  63. *                           |  (7 taps)  |                               *
  64. *                           --------------                               *
  65. *                                                                        *
  66. *                   Figure 2. DSP56200 Configuration                     *
  67. *                                                                        *
  68. *                                                                        *
  69. \************************************************************************/
  70.  
  71.  
  72.  
  73. Flowchart #4: Dual FIR Filter Mode, Single Chip - Polled I/O
  74.  
  75.    Main Program:
  76.  
  77.  
  78.                              -----------
  79.                              |  Begin  |
  80.                              -----------
  81.                                   |
  82.                                   +<---------
  83.                                   |          |
  84.                              -----------   No|
  85.                            /    START    \___
  86.                            \  Received ? /   
  87.                              -----------
  88.                                   | Yes
  89.                                   |
  90.                       ------------------------- 
  91.                       | Write Bank 1 Regs:    | 
  92.                       |    CONFIG  = 51 (hex) | 
  93.                       |    FTL     = 06 (hex) | 
  94.                       ------------------------- 
  95.                                   |              
  96.                                   |              
  97.                        ------------------------  
  98.                        | Switch to Bank 0:    |  
  99.                        |    CONFIG = 50 (hex) |  
  100.                        ------------------------  
  101.                                   |              
  102.                         ----------------------  
  103.                         | Write Bank 0 Regs: |  
  104.                         |    X1     = 0      |  
  105.                         |    X2     = 0      |  
  106.                         |    COEFF  = ROM[0] |  
  107.                         |    RAMADR = 0      |  
  108.                         ----------------------  
  109.                                   |              
  110.                             ------------
  111.                             |  tap = 1  |
  112.                             ------------
  113.                                   |              
  114.                     ------------->+
  115.                    |              |              
  116.                    |      -----------------
  117.                    |    /  tap <= (1+2*FTL) \____________
  118.                    |    \         ?         / No         |
  119.                    |      -----------------              |
  120.                    |              | Yes                  |
  121.                    |              |                      |
  122.                    |              +<---------            |
  123.                    |              |          |           |
  124.                    |         -----------   No|           V
  125.                    |       /    START    \___            |
  126.                    |       \  Received ? /               |
  127.                    |         -----------                 |
  128.                    |              | Yes                  |
  129.                    |              |                      |
  130.                    |   ------------------------          |
  131.                    |   | Write Bank 0 Regs:   |          |
  132.                    |   |    COEFF  = ROM[tap] |          |
  133.                    |   ------------------------          |
  134.                    |              |                      |
  135.                    |       ---------------               |
  136.                    |       | tap = tap+1 |               |
  137.                    |       ---------------               |
  138.                    |              |                      |
  139.                    |              |                      |
  140.                     --------------                       |
  141.                                                          |
  142.                                                          |
  143.                                    ----------------------
  144.                                   |
  145.                                   |
  146.              -------------------->+<---------
  147.             |                     |          |
  148.             |                -----------   No|
  149.             |              /    START    \___ 
  150.             |              \  Received ? /    
  151.             |                -----------  
  152.             |                     | Yes    
  153.             |                     |         
  154.             |           ---------------------
  155.             |           | Get 2 New Samples |
  156.             |           |   From the A/Ds   |
  157.             |           ---------------------
  158.             |                     |            
  159.             |         -------------------------
  160.             |         | Write the New Samples |
  161.             |         | to the X1 and X2 Regs |
  162.             |         -------------------------
  163.             |                     |          
  164.             |          ------------------------
  165.             |          |   Read Two Results   |
  166.             |          | from the OUTPUT Reg. |
  167.             |          ------------------------
  168.             |                     |         
  169.             |            --------------------
  170.             |            | Send the Results |
  171.             |            |    to the D/As   |
  172.             |            --------------------
  173.             |                     |
  174.             |                     |
  175.              ---------------------
  176.                 (infinite loop)
  177.  
  178.  
  179.  
  180.